Eight things we learned from Intel’s Innovation keynote

Intel wrapped up its annual innovation event in San Jose, where the chipmaker gave us a glimpse of what’s to come in the coming years. In case you don’t have a free hour and a half to sit and watch CEO Pat Gelsinger’s keynote fundamentalHere are some important things we learned.

The company officially presented its “Meteor Lake” generation (officially known as Intel Core Ultra) to the world at the Innovation keynote. These will succeed the 13th generation “Raptor Lake” line; They will be the first chips built in the new one. Intel process 4 and it is the first with a dedicated AI coprocessor inside.

They’re also Intel’s first consumer CPUs to incorporate different chiplets for each component (something competitors like AMD and Qualcomm have been doing for a while). In this case, there will be four tiles: computing, graphics, SoC and I/O.

The SoC tile is essentially a low-power processor in itself. In addition to features like wireless connectivity, native HDMI 2.1 and DP 2.1 standards, and an integrated memory controller, the tile includes separate “low-power island” E cores that are specifically designed for lighter workloads. The idea is that this setup could offload lighter processes from the power-consuming computing tile. This would, in theory, allow the chips to save power, which is why Intel calls Meteor Lake the most efficient client processor it has ever made.

On the gaming front, Meteor Lake can incorporate Intel’s Arc graphics directly into the chip. No each The Meteor Lake processor will get them: They’ll come to “select systems with MTL processor with dual-channel memory” according to the fine print.

In a question and answer session, Pat Gelsinger was asked if Intel would challenge the 3D V-Cache technology that powers desktop chips like its Ryzen 7 7800X3D, technology that was also recently introduced for laptops earlier this summer. Gelsinger confirmed in response that Intel has a similar idea on its roadmap, although it won’t be part of the Meteor Lake generation.

For those unfamiliar, 3D V-Cache allows AMD to stack additional cache (high-speed short-term memory) directly into your CPU. The results we saw on the ROG Strix Scar X3D (the monster RTX 4090 gaming laptop where 3D V-Cache made its mobile debut) were great for AMD and worrying for Intel. It’s an incredibly powerful device that surpasses Intel’s 4090 offerings.

Intel needs an answer to 3D V-Cache if it wants to stay on top of the high-end gaming market. It seems that he is on the case.

In a way, at least some capacity. The opening speech on Day 1 included the world’s first screening of a Lunar lake system; we saw the PC generate a Taylor Swift-style song and an image of a giraffe wearing a cowboy hat. You know, like computers do.

Intel also confirmed that Lunar Lake is on track to launch in 2024. Like its predecessor, the Meteor Lake sequel will use Intel’s Foveros design. It is also supposed to mark the commercial debut of Intel’s 1.8nm manufacturing process, known as Intel 18A. (In human terms: your transistors will be very, very, very small.)

Gelsinger confirmed that a generation of CPU called “Panther Lake” will be announced in 2025 and that the company has started working on it. (This name was leaked earlier this year after an Intel engineer I accidentally put it on LinkedIn.) We know next to nothing about Panther Lake right now, but Intel says it’s scheduled to go into factory production as soon as the first quarter of 2024.

For those keeping track (and let’s be honest, I know all of you are), this means the progression will probably be: Meteor (2023), Arrow (2024), Lunar (2024, probably), Panther (2025).

Gelsinger showed off Pike Creek, which is the first working place in the world. UCIe enabled Chiplet-based processor. UCIe stands for “Universal Chiplet Interconnect Express” and is essentially a plug-and-play standard that can allow different silicon modules to work together in a chiplet package. A chipmaker could take another company’s chiplet and incorporate it into its design. In theory, this would allow chipmakers to better specialize in certain types of chiplets and bring their products to market more quickly.

Intel will use the UCIe interface after Arrow Lake and is the first company to show working silicon. (Intel donated the first version of the UCIe specification to the standards body that is developing it.)

Currently, Intel uses an organic resin as the base of its chips. The company announced that it has begun the transition to a new technology that will allow chips to sit on a glass base. This should give Intel more room to include additional transistors, as well as (Intel hopes) better data transfer, less warping, and less mechanical breakage under heat.

Don’t get too excited: this won’t arrive until the second half of this decade, and will first appear in a giant data center.

A couple of journalists were able to see this production process inside the Intel factory. CNET has some great photos.

Gelsinger announced the upcoming Sierra Forest Xeon processor, which has 288 E-cores. You know, in case you discover that the number of cores you have right now isn’t enough for your backyard data center.

Intel also confirmed that the fifth-generation “Emerald Rapids” Xeon line will launch on December 14 of this year.

He didn’t actually say this himself, but his colleague Craig suggested it might be the case, and Gelsinger sheepishly nodded, which is all the proof I need. What do we all think is his favorite album? I get Reputation vibes.

See you on the Eras Tour, Pat!